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General Information
Wednesday, 7 January 2026, 00:01 – Monday, 7 January 2036, 00:01
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Lectures
Wednesday, 14 January 2026, 14:01 – Monday, 14 January 2036, 14:01
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SoC Survey
Wednesday, 14 January 2026, 00:01 – Thursday, 29 January 2026, 23:58
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Introduction to SystemVerilog
Monday, 19 January 2026, 00:01 – Tuesday, 10 February 2026, 23:58
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Exercise 0: Hello, Didactic
Wednesday, 11 February 2026, 15:00 – Wednesday, 4 March 2026, 23:58
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Exercise 1: Module-Level Design
Wednesday, 11 March 2026, 13:00 – Sunday, 26 April 2026, 23:58
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Exercise 2: Documentation
Friday, 17 April 2026, 12:00 – Sunday, 17 May 2026, 23:58
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Exercise 3: System-Level Integration
Wednesday, 22 April 2026, 12:00 – Sunday, 31 May 2026, 23:58
SoC Project
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SoC Survey
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SystemVerilog Intro
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